top of page
ldapimage.png

Shaahin Angizi

Assistant Professor @ NJIT

​

google-scholar--v2.png

I (Shaahin Angizi) am an Assistant Professor in the Department of Electrical and Computer Engineering, New Jersey Institute of Technology (NJIT), Newark, NJ, USA, and the director of the ACAD Lab. 

I completed my doctoral studies in Electrical Engineering at the School of Electrical, Computer and Energy Engineering, Arizona State University (ASU), Tempe, AZ.

​

My group research interests include the cross-layer (device/circuit/architecture/algorithm/application) co-design of energy-efficient and high-performance systems with the following directions:

  • Accelerator Design for Big Data Applications: Deep Learning, Bioinformatics, Graph Processing, etc.

  • Low Power and Area-Efficient In-Sensor Computing for IoT 

  • In-Memory Computing with Volatile & Non-Volatile Memories

  • Memory Security Solutions for Large-scale Deep Learning Applications

  • Low-power VLSI circuits

SRC_logo_blue_edited.png

News:​

  • [April 24]: I am invited to serve as a TPC member for ICCAD 2024.

  • [April 24]: Our paper titled "RACSen: Residue Arithmetic and Chaotic Processing in Sensors to Enhance CMOS Imager Security" is accepted to GLSVLSI 2024.

  • [Feb 24]: Our paper titled "Deep-TROJ: An Inference Stage Trojan Insertion Algorithm through Efficient Weight Replacement Attack" is accepted to CVPR 2024.

  • [Feb 24]: Three papers are accepted to DAC 2024.

  • [Feb 24]: I am invited to serve as a TPC member for ISVLSI 2024.

  • [Feb 24]: Our paper “Enabling Normally-off In-Situ Computing with a Magneto-Electric FET-based SRAM Design” is accepted to IEEE TED.

  • [Feb 24]: I am invited to serve as a TPC member for GLSVLSI 2024.

  • [Jan 24]: I am invited to serve as a TPC member for ISLPED 2024.

  • [Jan 24]: Our paper “Semi-decentralized Inference in Heterogeneous Graph Neural Networks for Traffic Demand Forecasting: An Edge-Computing Approach” is accepted to IEEE TVT.

  • [Dec 23]: Professor Onur Mutlu of ETH Zurich will be visiting ACAD-Lab and giving a talk on RowHammer.

  • [Nov 23]: Three papers are accepted to DATE 2024.

  • [Oct 23]: Our paper “Deep Mapper: A Multi-Channel Single-Cycle Near-Sensor DNN Accelerator” is accepted to ICRC 2023.

  • [Oct 23]: I am invited to serve as a TPC member for DAC 2024.

  • [Sep 23]: SRC Grant Award received for "Revolutionizing In-Sensor Processing with AI Acceleration and Integration". 

  • [Sep 23]: I am invited to serve as a TPC member for DATE 2024.

  • [Sep 23]: NSF Grant Award received for "CSR: Small: Cross-Layer Solutions Enabling Instant Computing for Edge Intelligence Devices". 

  • [Sep 23]: We host the 2nd Seasonal School on Intelligent Memory & Sensor at the Edge (IMS 2023) on October 10th, 2023.

  • [Aug 23]: Deniz joined ACAD Lab as a new Ph.D. student. Welcome Deniz!

  • [Aug 23]: Our paper “PiPSim: A Behavior-Level Modeling Tool for CNN Processing-in-Pixel Accelerators” is accepted to IEEE TCAD.

  • [July 23]: I am invited to give a talk at Solid-State Circuits Society (SSCS) Open Journal Webinar Series. If interested, register here.

  • [July 23]: I have been selected as an Honorary Member of the National Academy of Inventor (NAI).

  • [July 23]: I am invited to serve as a TPC member for ISQED 2024.

  • [July 23]: Our paper "Ocellus: Highly Parallel Convolution-in-Pixel Scheme Realizing Power-Delay-Efficient Edge Intelligence" has been selected as the Best Paper Candidate in ISLPED 2023.

  • [July 23]: Our paper “Design and Evaluation of a Near-Sensor Magneto-Electric FET-based Event Detector” is accepted to IEEE TED.

  • [July 23]: Our paper “PISA: A Non-Volatile Processing-In-Sensor Accelerator for Imaging Systems” is accepted to IEEE TETC.

  • [June 23]: I am invited to serve as a TPC member for ICCD 2023.

  • [June 23]: Our paper “Comparative Study of Low Bit-width DNN Accelerators: Opportunities and Challenges” is accepted to MWSCAS 2023.

  • [June 23]: Our paper “Near-Sensor Processing Accelerator for Approximate Local Binary Pattern Networks” is accepted to IEEE TETC.

  • [June 23]: ACAD Lab received the Best Paper Award in GLSVLSI 2023. Congratulations to Mehrdad and team!

  • [May 23]: Our paper “Ocellus: Highly Parallel Convolution-in-Pixel Scheme Realizing Power-Delay-Efficient Edge Intelligence” is accepted to ISLPED 2023.

  • [April 23]: Our paper "IMA-GNN: In-Memory Acceleration of Centralized and Decentralized Graph Neural Networks at the Edge" has been selected as the Best Paper Candidate in GLSVLSI 2023. Congratulations to Mehrdad!

  • [April 23]: I am invited to serve as a TPC member for ICCAD 2023.

  • [April 23]: I am invited to serve as a TPC member for NOCS 2023.

  • [Mar 23]: Two papers are accepted to GLSVLSI 2023.

  • [Mar 23]: Ranyang, Mehrdad, and Nakul presented our latest research at Computer Architecture Day at Princeton University. 

  • [Mar 23]: I am invited to serve as a TPC member for ICONS 2023.

  • [Feb 23]: I am invited to serve as a TPC member for ISVLSI 2023.

  • [Feb 23]: I am invited to serve as a TPC member for GLSVLSI 2023.

  • [Feb 23]: Our paper “AppCiP: Energy-Efficient Approximate Convolution-in-Pixel Scheme for Neural Network Acceleration” is accepted to IEEE JETCAS.

  • [Jan 23]: IEEE CAS Grant for Seasonal School on Intelligent Memory & Sensor at the Edge (IMS 2023).  

  • [Jan 23]: Our paper “XOR-CiM: An Efficient Computing-in-SOT-MRAM Design for Binary Neural Network Acceleration” is accepted to ISQED 2023.

  • [Jan 23]: Our paper “NeSe: Near-Sensor Event-Driven Scheme for Low Power Energy Harvesting Sensors” is accepted to ISCAS 2023.

  • [Jan 23]: Our paper “Aligner-D: Leveraging in-DRAM Computing to Accelerate DNA Short Read Alignment” is accepted to IEEE JETCAS.

  • [Jan 23]: I am invited to serve as a TPC member for ISLPED 2023.

  • [Dec 22]: I am invited to serve as a TPC member for the tinyML Research Symposium 2023.

  • [Nov 22]: Our paper “P-PIM: A Parallel Processing-in-DRAM Framework Enabling RowHammer Protection” is accepted to DATE 2023.

  • [Nov 22]: Our paper “LT-PIM: An LUT-based Processing-in-DRAM Architecture with RowHammer Self-Tracking” is accepted to IEEE CAL.

  • [Oct 22]: I am invited to serve as a TPC member for DAC 2023.

  • [Oct 22]: Our paper “Ocelli: Efficient Processing-in-Pixel Array Enabling Edge Inference of Ternary Neural Networks” is accepted to the Journal of Low Power Electronics and Applications.

  • [Sep 22]: Our paper “MR-PIPA: An Integrated Multi-level RRAM (HfOx) based Processing-In-Pixel Accelerator” is accepted to IEEE JXCDC.

  • [Sep 22]: NSF Grant Award received for "Collaborative Research: Integrated Sensing and Normally-off Computing for Edge Imaging Systems".

  • [Sep 22]: Our paper “semiMul: Floating-Point Free Implementations for Efficient and Accurate Neural Network Training” is accepted to ICMLA'22.

  • [Aug 22]: NSF Grant Award received for "CNS Core: Small: Toward Opportunistic, Fast, and Robust In-Cache AI Acceleration at the Edge"

  • [Aug 22]: Our paper “Energy-Efficient Recurrent Neural Network with MRAM-based Probabilistic Activation Functions” is accepted to IEEE TETC.

  • [Aug 22]: Our paper “TizBin: A Low-Power Image Sensor with Event and Object Detection Using Efficient Processing-in-Pixel Schemes” is accepted to ICCD'22.

  • [Aug 22]: Our paper “Enabling Intelligent IoTs for Histopathology Image Analysis Using Convolutional Neural Networks” is accepted to Micromachines.

  • [Aug 22]: I am invited to serve as a TPC member for ISQED 2023.

  • [July 22]: I am invited to serve as a Track Chair for VLSID 2023.

  • [July 22]: Our paper “ReD-LUT: Reconfigurable In-DRAM LUTs Enabling Massive Parallel Computation” is accepted to ICCAD'22.

  • [July 22]: Our paper “A Processing-in-Pixel Accelerator based on Multi-level HfOx ReRAM” is accepted to ESWEEK CASES'22.

  • [May 22]: Our paper “A 1.23-GHz 16-Kb Programmable and Generic Processing-in-SRAM Accelerator in 65nm” is accepted to ESSCIRC'22.

  • [May 22]: I am invited to serve as a TPC member for NOCS 2022.

  • [May 22]: Our paper “FlexiDRAM: A Flexible in-DRAM Framework to Enable Parallel General-Purpose Computation ” is accepted to ISLPED'22.

  • [May 22]: Our paper “Design and Evaluation of a Robust Power-Efficient Ternary SRAM Cell ” is accepted to MWSCAS'22.

  • [May 22]: Our paper “EaseMiss: HW/SW Co-Optimization for Efficient Large Matrix-Matrix Multiply Operations ” is accepted to DCAS'22.

  • [April 22]: I am invited to serve as a TPC member for ICCD 2022.

  • [Mar 22]: Invited to give an IEEE talk on "Towards Energy-Efficient Domain-Specific In-Sensor and In-Memory Accelerators, From Device to Algorithm".

  • [Mar 22]: I am invited to serve as a TPC member for ICCAD 2022.

  • [Mar 22]: I am invited to serve as a TPC member for ISVLSI 2022.

  • [Feb 22]: Our paper “Efficient Targeted Bit-Flip Attack Against the Local Binary Pattern Network” is accepted to HOST'22.

  • [Feb 22]: I am invited to serve as a TPC member for GLSVLSI 2022.

  • [Jan 22]: I am invited to serve as a Panelist on the Mondays in Memory (MiM) Webinar Series.

  • [Jan 22]: Our paper “SCiMA: a Generic Single-Cycle Compute-in-Memory Acceleration Scheme for Matrix Computations” is accepted to ISCAS'22.

  • [Dec 21]: Our paper “ReFACE: Efficient Design Methodology for Acceleration of Digital Filter Implementations” is accepted to ISQED'22.

  • [Nov 21]: I am invited to serve as a TPC member for VLSID 2022.

  • [Oct 21]: I am invited to serve as a TPC member for DAC 2022.

  • [Oct 21]: I am invited to serve as a TPC member for ISQED 2022.

  • [Aug 21]: Our paper “MeF-RAM: A New Non-Volatile Cache Memory Based on Magneto-Electric FET” is accepted to ACM Transactions on Design Automation of Electronic Systems (TODAES).

  • [Aug 21]: "Neuromorphic Computing: From Material to Algorithm (NeuMA)" workshop program at IEEE IGSC 2021 is now finalized.

  • [July 21]: Our paper “RNSiM: Efficient Deep Neural Network Accelerator Using Residue Number Systems” is accepted to the 40th International Conference On Computer Aided Design (ICCAD), 2021.

  • [April 21]: Our paper “Processing-in-Memory Acceleration of MAC-based Applications Using Residue Number System: A Comparative Study” in collaboration with UNL is accepted to the 31st edition of GLSVLSI.

  • [Feb 21]: Two papers are accepted to 58th DAC.

​

Academic Activities and Services:

Dr. Angizi has authored and co-authored more than 120 research articles in top-ranked international journals and top-tier electronic design automation conferences such as IEEE TCAD, IEEE TC, IEEE TCASI, IEEE TETC, DAC, DATE, ICCAD, ASP-DAC, etc. He received the “Best Ph.D. research award” at the Design Automation Conference’s Ph.D. forum in 2018, two “Best Paper” awards at the IEEE Computer Society Annual Symposium on Very Large-Scale Integration (VLSI) in 2017 and 2018, and two “Best Paper” awards at the ACM Great Lakes Symposium on VLSI in 2019 and 2023. He has served as a technical reviewer for over 30 international journals/conferences, such as IEEE TC, TETC, TVLSI, TCAD, TNANO, TCAS, ESL, ACM JETC, MICRO, DAC, ASP-DAC, DATE, ICCAD, ICCD, GLSVLSI, ISVLSI, etc.

Selected Awards and Distinctions:

2023   SRC AIHW Grant Award

2023   NSF CSR Grant Award

2023   Best Paper Award of 2023 ACM Great Lakes Symposium on VLSI (GLSVLSI), Knoxville, Tennessee, USA​

2022   NSF CNS Core Grant Award

2022   NSF CCSS Grant Award

2019   Best Paper Award of 2019 ACM Great Lakes Symposium on VLSI (GLSVLSI), Washington, D.C., USA​

2018   Best Ph.D. Research Award (1st-place) of 2018 Ph.D. Forum at Design Automation Conference (DAC), San Francisco, CA, USA​

2018   Best Paper Award of 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Hong Kong, China​

2018   Featured Paper of October-December 2018 issue of IEEE Transactions on Emerging Topics in Computing​

2017   Best Paper Award of 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Bochum, Germany​

Events & Seminars at ACAD Lab:

bottom of page